reg has_factor2_next;

reg [DRAM_NUMS_WIDTH-1:0] other_port_num_rd_next;

reg [NUM_STATES-1:0] state;

reg [NUM_STATES-1:0] state_next;

reg [4:0] couter;

wire [4:0] couter_next;

reg couter_start;

reg[CAM_ADDR_WIDTH-1:0] atch_addr_temp_2,match_addr_temp_2_next;

reg[CAM_ADDR_WIDTH-1:0] match_addr_temp_1,match_addr_temp_1_next;

reg[CAM_ADDR_WIDTH-1:0] match_addr_temp_0,match_addr_temp_0_next;

reg [SRC_GEN_SEQ_WIDTH-1:0] cmp_data;

// ------------ main code and logic -------------

assign src_num_plus1 = (src_num == 2) ? 0 : src_num + 1;

assign gen_num_plus1 = (gen_num == 2**GEN_WIDTH-1) ? 0 : gen_num + 1;

assign rd_dcod_src_gen_1 = {src_num_sel,gen_num_sel};

assign couter_next = (couter_start == 1) ? couter+1 : couter;

assign cmp_data_0 = cmp_data;

assign cmp_data_1 = cmp_data;

assign cmp_data_2 = cmp_data;

/* This state machine completes decode control task. If enough packets have

* been saved in cams and DRAMS, it starts to decode to packets. If

* a packet can not be decoded becouse of losing, it will decode the next

* packet automatically */

always @(*) begin

state_next = state;

gen_num_next = gen_num;

src_num_next = src_num;

src_num_sel_next = src_num_sel;

gen_num_sel_next = gen_num_sel;

cam_lookup_reslt_next = cam_lookup_reslt;

rd_dcod_reg_req_1 = 1'b0;

addr_vld = 1'b0;

pkt_vld = 1'b0;

pkt_not_find = 1'b0;

other_dram_addr_next = other_dram_addr;

other_port_num_rd_next =other_port_num_rd;

has_factor2_next = has_factor2;

pkt_dcoding = 12'hfff;

block_num_rd = 2'b0;

cam_lookup_reslt_pre_next = cam_lookup_reslt_pre;

cam_lookup_reslt_save_next = cam_lookup_reslt_save;

port_num_rd = 2'b11;

couter_start = 1'b0;

match_addr_temp_2_next = match_addr_temp_2;

match_addr_temp_1_next = match_addr_temp_1;

match_addr_temp_0_next = match_addr_temp_0;

cmp_data_mask_0 = 24'h0;

cmp_data_mask_1 = 24'h0;

cmp_data_mask_2 = 24'h0;

has_other_factor = 0;

cmp_data = 24'hffffff;

case(state)

/* --- waiting for the cam has been writen enough packet */

IDLE: begin

if(cam_vld) begin

couter_start = 1;

end

if(couter == 5'b11111)

state_next = GET_SRC_GEN_NUM;

end

/* Goes round-robin around the sources and generations,

* gets the source sequence number and generation sequebce

* number of a packet need to be decoded */

GET_SRC_GEN_NUM: begin

state_next = LOOK_UP_CAM;

rd_dcod_reg_req_1 = 1; // read the decoded reg grp

src_num_sel_next = src_num;

gen_num_sel_next = gen_num;

src_num_next = src_num_plus1;

if(src_num == 4'b0010)

gen_num_next = gen_num_plus1;

end

/* --- look up pkt in three cams to get block number of DRAM*/

LOOK_UP_CAM:

if(req_ack_vld_1) begin

if(alredy_decod_1 == 1) // it has been decoded,decode the next packet

state_next = GET_SRC_GEN_NUM;

else begin

cmp_data = {src_num_sel,gen_num_sel,12'hfff};

cmp_data_mask_0 = {12'h0,CMP_DATA_MASK};

cmp_data_mask_1 = {12'h0,CMP_DATA_MASK};

cmp_data_mask_2 = {12'h0,CMP_DATA_MASK};

state_next = GET_CMP_RESLT_FIRST;

end

end

GET_CMP_RESLT_FIRST: begin

cam_lookup_reslt_next = {match_2,match_1,match_0};

cmp_data = {12'hfff,src_num_sel,gen_num_sel};

cmp_data_mask_0 = {CMP_DATA_MASK,12'h0};

cmp_data_mask_1 = {CMP_DATA_MASK,12'h0};

cmp_data_mask_2 = {CMP_DATA_MASK,12'h0};

state_next = GET_CMP_RESLT_SEC;

match_addr_temp_2_next = match_addr_2;

match_addr_temp_1_next = match_addr_1;

match_addr_temp_0_next = match_addr_0;

end /* get the address from the cams, if there are two adresses from

* the cams, then outputs the one to the DRAM control and save

*