S3C2440-啟動分析

作者：時(shí)間：2016-12-02 來源：網(wǎng)絡(luò)

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/*******************************************************************

設(shè)置內(nèi)存控制寄存器，在SMRDATA中已經(jīng)設(shè)定好，BWSCON總線寬度和等待狀態(tài)寄存器，地址0x48000000，是13內(nèi)存控制寄存器的起始地址。

*******************************************************************/

ldr r0,=SMRDATA

ldr r1,=BWSCON

add r2, r0, #52 ；r2是這13個(gè)寄存器結(jié)束的地址

ldr r3, [r0], #4 ；通過r3作為中介，把以r0為基址的內(nèi)容向r1為基址的地方拷貝

str r3, [r1], #4

cmp r2, r0 ；如果沒有結(jié)束繼續(xù)拷貝

bne %B0

mov r1,#256

0 subs r1,r1,#1

bne %B0

ldr r1,=GSTATUS3 ;GSTATUS3 has the start address just after SLEEP wake-up

ldr r0,[r1]

mov pc,r0

;=====================================================================

; Clock division test

; Assemble code, because VSYNC time is very short

;=====================================================================

EXPORT CLKDIV124

EXPORT CLKDIV144

CLKDIV124

ldr r0, = CLKDIVN

ldr r1, = 0x3 ; 0x3 = 1:2:4

str r1, [r0]

; wait until clock is stable

nop

ldr r0, = REFRESH

ldr r1, [r0]

bic r1, r1, #0xff

bic r1, r1, #(0x7＜＜8)

orr r1, r1, #0x470 ; REFCNT135

str r1, [r0]

nop

mov pc, lr

CLKDIV144

ldr r0, = CLKDIVN

ldr r1, = 0x4 ; 0x4 = 1:4:4

str r1, [r0]

; wait until clock is stable

nop

ldr r0, = REFRESH

ldr r1, [r0]

bic r1, r1, #0xff

bic r1, r1, #(0x7＜＜8)

orr r1, r1, #0x630 ; REFCNT675 - 1520

str r1, [r0]

nop

mov pc, lr

ALIGN

；二級中斷向量表，軟件實(shí)現(xiàn)的

AREA RamData, DATA, READWRITE

^ _ISR_STARTADDRESS ; _ISR_STARTADDRESS=0x33FF_FF00

HandleReset # 4

HandleUndef # 4

HandleSWI # 4

HandlePabort # 4

HandleDabort # 4

HandleReserved # 4

HandleIRQ # 4

HandleFIQ # 4

;Don t use the label IntVectorTable,

;The value of IntVectorTable is different with the address you think it may be.

;IntVectorTable

;@0x33FF_FF20

HandleEINT0 # 4

HandleEINT1 # 4

HandleEINT2 # 4

HandleEINT3 # 4

HandleEINT4_7 # 4

HandleEINT8_23 # 4

HandleCAM # 4 ; Added for 2440.

HandleBATFLT # 4

HandleTICK # 4

HandleWDT # 4

HandleTIMER0 # 4

HandleTIMER1 # 4

HandleTIMER2 # 4

HandleTIMER3 # 4

HandleTIMER4 # 4

HandleUART2 # 4

;@0x33FF_FF60

HandleLCD # 4

HandleDMA0 # 4

HandleDMA1 # 4

HandleDMA2 # 4

HandleDMA3 # 4

HandleMMC # 4

HandleSPI0 # 4

HandleUART1 # 4

HandleNFCON # 4 ; Added for 2440.

HandleUSBD # 4

HandleUSBH # 4

HandleIIC # 4

HandleUART0 # 4

HandleSPI1 # 4

HandleRTC # 4

HandleADC # 4

;@0x33FF_FFA0

END

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