/*******************************************************************************
* 函數(shù)名稱: RCC_Configuration
* 函數(shù)功能: 25MHZ 設(shè)置系統(tǒng)各部分時鐘
* 參數(shù)變量: NONE
* 全局變量: NONE
* 調(diào)用函數(shù):
* 作 者:
* 編寫時間:

* 修改時間:
* 版 本: V1.0
* 狀 態(tài):調(diào)試完成
*******************************************************************************/
void RCC_Configuration(void)
{
RCC_DeInit();
RCC_HSEConfig(RCC_HSE_ON);// Enable HSE
HSEStartUpStatus = RCC_WaitForHSEStartUp();//Wait till HSE is ready
if(HSEStartUpStatus==SUCCESS)
{
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);//Enable Prefetch Buffer
FLASH_SetLatency(FLASH_Latency_2); // Flash 2 wait state
RCC_HCLKConfig(RCC_SYSCLK_Div1);//HCLK = SYSCLK
RCC_PCLK2Config(RCC_HCLK_Div1);//PCLK2 = HCLK
RCC_PCLK1Config(RCC_HCLK_Div2);//PCLK1 = HCLK/2
RCC_ADCCLKConfig(RCC_PCLK2_Div4);//ADCCLK = PCLK2/4
#ifndef STM32F10X_CL
RCC_PLLConfig(RCC_PLLSource_HSE_Div1,RCC_PLLMul_9);//PLLCLK = 8MHz * 9 = 72 MHz
#else
// Configure PLLs *********************************************************
//PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz
RCC_PREDIV2Config(RCC_PREDIV2_Div5);
RCC_PLL2Config(RCC_PLL2Mul_8);
RCC_PLL2Cmd(ENABLE);
while(RCC_GetFlagStatus(RCC_FLAG_PLL2RDY)== RESET)
{}
RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2,RCC_PREDIV1_Div5);
RCC_PLLConfig(RCC_PLLSource_PREDIV1,RCC_PLLMul_9);//PLLCLK = 8MHz * 9 = 72 MHz
RCC_PLL3Config(RCC_PLL3Mul_11);
RCC_PLL3Cmd(ENABLE);
while(RCC_GetFlagStatus(RCC_FLAG_PLL3RDY)== RESET)
{}
RCC_I2S3CLKConfig(RCC_I2S3CLKSource_PLL3_VCO);
RCC_I2S2CLKConfig(RCC_I2S2CLKSource_PLL3_VCO);
#endif
RCC_PLLCmd(ENABLE);// Enable PLL
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)// Wait till PLL is ready
{
}
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);// Select PLL as system clock source
while(RCC_GetSYSCLKSource() != 0x08)// Wait till PLL is used as system clock source
{
}
}
}