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            GNU ARM匯編--(九)s3c2440的PWM
            
						
            
				作者：
				時(shí)間：2016-11-26
				來(lái)源：網(wǎng)絡(luò)
				
				
				
				
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            1. /*
            2. copyleft@[email protected]
            3. */
            5. .equNOINT,0xc0
            7. .equGPBCON,0x56000010@led
            8. .equGPBDAT,0x56000014@led
            9. .equGPBUP,0x56000018@led
            10. .equGPFCON,0x56000050@interruptconfig
            11. .equEINTMASK,0x560000a4
            12. .equEXTINT0,0x56000088
            13. .equEXTINT1,0x5600008c
            14. .equEXTINT2,0x56000090
            15. .equINTMSK,0x4A000008
            16. .equEINTPEND,0x560000a8
            18. .equSUBSRCPND,0x4a000018
            19. .equINTSUBMSK,0x4a00001c
            23. .equSRCPND,0X4A000000
            24. .equINTPND,0X4A000010
            27. .equGPHCON,0x56000070
            28. .equGPHDAT,0x56000074
            30. .equGPB5_out,(1<<(5*2))
            31. .equGPB6_out,(1<<(6*2))
            32. .equGPB7_out,(1<<(7*2))
            33. .equGPB8_out,(1<<(8*2))
            35. .equGPBVALUE,(GPB5_out|GPB6_out|GPB7_out|GPB8_out)
            37. .equLOCKTIME,0x4c000000
            38. .equMPLLCON,0x4c000004
            39. .equUPLLCON,0x4c000008
            40. .equM_MDIV,92
            41. .equM_PDIV,1
            42. .equM_SDIV,1
            43. .equU_MDIV,56
            44. .equU_PDIV,2
            45. .equU_SDIV,2
            47. .equCLKDIVN,0x4c000014
            48. .equDIVN_UPLL,0
            49. .equHDIVN,1
            50. .equPDIVN,1@FCLK:HCLK:PCLK=1:2:4
            53. .equWTCON,0x53000000
            54. .equPre_scaler,249
            55. .equwd_timer,1
            56. .equclock_select,00@316
            57. .equint_gen,1@開(kāi)中斷
            58. .equreset_enable,0@關(guān)掉重啟信號(hào)
            60. .equWTDAT,0x53000004
            61. .equCount_reload,50000@定時(shí)器定為2SPCLK=100MPCLK/(Pre_scaler+1)/clock_select=100M/(249+1)/16=25k50000/25k=2s
            63. .equWTCNT,0x53000008
            64. .equCount,50000
            67. .equTCFG0,0x51000000
            68. .equPrescaler1,0x00@[15:8]Timer234
            69. .equPrescaler0,249@[7:0]Timer01
            71. .equTCFG1,0x51000004
            72. .equDMA_MODE,0x0@[23:20]nodmachannal
            73. .equMUX0,0x2@[3:0]1/8
            74. @定時(shí)器輸入時(shí)鐘周期=PCLK/(prescaler+1)/(dividervalue)
            75. @clk=100M/(249+1)/8=25k
            77. .equTCON,0x51000008
            78. .equDZ_eable,0@[4]關(guān)閉死區(qū)的操作
            79. .equauto_reload,1@[3]auto_reload
            80. .equinverter,1@[2]打開(kāi)電平反轉(zhuǎn)
            81. .equman_update,1@[1]手動(dòng)更新
            82. .equclear_man_update,0
            83. .equstart,1@[0]開(kāi)始
            84. .equstop,0@[0]停止
            86. .equTCNTB0,0x5100000c
            87. .equTCMPB0,0x51000010
            89. .equTCNTO0,0x51000014
            92. .equULCON0,0x50000000
            93. .equIR_MODE,0x0@[6]正常模式
            94. .equParity_Mode,0x0@[5:3]無(wú)校驗(yàn)位
            95. .equNum_of_stop_bit,0x0@[2]一個(gè)停止位
            96. .equWord_length,0b11@[1:0]8個(gè)數(shù)據(jù)位
            98. .equUCON0,0x50000004
            99. .equFCLK_Div,0@[15:12]時(shí)鐘源選擇用PCLK,所以這里用默認(rèn)值
            100. .equClk_select,0b00@[11:10]時(shí)鐘源選擇使用PCLK
            101. .equTx_Int_Type,1@[9]中斷請(qǐng)求類型為L(zhǎng)evel
            102. .equRx_Int_Type,0@1@[8]中斷請(qǐng)求類型為L(zhǎng)evel
            103. .equRx_Timeout,0@[7]
            104. .equRx_Error_Stat_Int,1@[6]
            105. .equLoopback_Mode,0@[5]正常模式
            106. .equBreak_Sig,0@[4]不發(fā)送終止信號(hào)
            107. .equTx_Mode,0b01@[3:2]中斷請(qǐng)求或輪循模式
            108. .equRx_Mode,0b01@[1:0]中斷請(qǐng)求或輪循模式
            110. .equUFCON0,0x50000008
            111. .equTx_FIFO_Trig_Level,0b00@[7:6]
            112. .equRx_FIFO_Trig_Level,0b00@[5:4]
            113. .equTx_FIFO_Reset,0b0@[2]
            114. .equRx_FIFO_Reset,0b0@[1]
            115. .equFIFO_Enable,0b0@[0]非FIFO模式
            117. .equUMCON0,0x5000000C@這個(gè)寄存器可以不管的
            118. .equUTRSTAT0,0x50000010
            119. .equUERSTAT0,0x50000014
            120. .equUFSTAT0,0x50000018
            121. .equUMSTAT0,0x5000001C
            122. .equUTXH0,0x50000020@(L小端)
            123. .equURXH0,0x50000024@(L小端)
            125. .equUBRDIV0,0x50000028
            126. .equUBRDIV,0x35@PCLK=400M/4=100MUBRDIV=(int)(100M/115200/16)-1=53=0x35
            128. .globalBuzzer_Freq_Set
            130. .global_start
            131. _start:breset
            132. ldrpc,_undefined_instruction
            133. ldrpc,_software_interrupt
            134. ldrpc,_prefetch_abort
            135. ldrpc,_data_abort
            136. ldrpc,_not_used
            137. @birq
            138. ldrpc,_irq
            139. ldrpc,_fiq
            143. _undefined_instruction:.wordundefined_instruction
            144. _software_interrupt:.wordsoftware_interrupt
            145. _prefetch_abort:.wordprefetch_abort
            146. _data_abort:.worddata_abort
            147. _not_used:.wordnot_used
            148. _irq:.wordirq
            149. _fiq:.wordfiq
            151. .balignl16,0xdeadbeef
            153. reset:
            156. ldrr3,=WTCON
            157. movr4,#0x0
            158. strr4,[r3]@disablewatchdog
            160. ldrr0,=GPBCON
            161. ldrr1,=0x15400@這個(gè)時(shí)候暫不配置GPB0為T(mén)OUT0，這時(shí)候只是配置GPB0為T(mén)OUT0
            162. strr1,[r0]
            164. ldrr2,=GPBDAT
            165. ldrr1,=0x160
            166. strr1,[r2]
            168. blclock_setup
            169. bluart_init
            170. //bldelay
            173. msrcpsr_c,#0xd2@進(jìn)入中斷模式
            174. ldrsp,=3072@中斷模式的棧指針定義
            176. msrcpsr_c,#0xd3@進(jìn)入系統(tǒng)模式
            177. ldrsp,=4096@設(shè)置系統(tǒng)模式的棧指針
            179. @--------------------------------------------
            181. ldrr0,=GPBUP
            182. ldrr1,=0x03f0
            183. strr1,[r0]
            185. ldrr0,=GPFCON
            186. ldrr1,=0x2ea@0x2
            187. strr1,[r0]
            189. ldrr0,=EXTINT0
            190. @ldrr1,=0x8f888@0x0@0x8f888@~(7|(7<<4)|(7<<8)|(7<<16))//低電平觸發(fā)中斷
            191. ldrr1,=0xafaaa@0x0@0x8f888//下降沿觸發(fā)中斷
            192. strr1,[r0]
            194. ldrr0,=EINTPEND
            195. ldrr1,=0xf0@0b10000
            196. strr1,[r0]
            198. ldrr0,=EINTMASK
            199. ldrr1,=0x00@0b00000
            200. strr1,[r0]
            204. ldrr0,=SRCPND
            205. ldrr1,=0x3ff@0x1@0b11111
            206. strr1,[r0]
            208. ldrr0,=SUBSRCPND
            209. ldrr1,=0x1<<13
            210. strr1,[r0]
            212. ldrr0,=INTPND
            213. ldrr1,=0x3ff@0x1@0b11111
            214. strr1,[r0]
            216. ldrr0,=INTSUBMSK
            217. ldrr1,=0x0<<13
            218. strr1,[r0]
            220. ldrr0,=INTMSK
            221. ldrr1,=0xfffff000@0b00000
            222. strr1,[r0]
            224. MRSr1,cpsr
            225. BICr1,r1,#0x80
            226. MSRcpsr_c,r1
            229. blmain
            231. irq:
            232. sublr,lr,#4
            233. stmfdsp!,{r0-r12,lr}
            236. blirq_isr
            237. ldmfdsp!,{r0-r12,pc}^
            240. irq_isr:
            242. ldrr2,=GPBDAT
            243. ldrr1,=0x0e0
            244. strr1,[r2]
            247. ldrr0,=EINTPEND
            248. ldrr1,=0xf0
            249. strr1,[r0]
            251. ldrr0,=SRCPND
            252. ldrr1,=0x3ff@0b11111
            253. strr1,[r0]
            255. ldrr0,=SUBSRCPND
            256. ldrr1,=0x3ff@0x1<<13
            257. strr1,[r0]
            259. ldrr0,=INTPND
            260. ldrr1,=0x3ff@0b11111
            261. strr1,[r0]
            263. movpc,lr
            266. delay:
            268. ldrr3,=0xffffff
            270. delay1:
            271. subr3,r3,#1
            273. cmpr3,#0x0
            275. bnedelay1
            277. movpc,lr
            280. clock_setup:
            282. ldrr0,=LOCKTIME
            283. ldrr1,=0xffffffff
            284. strr1,[r0]
            286. ldrr0,=CLKDIVN
            287. ldrr1,=(DIVN_UPLL<<3)|(HDIVN<<1)|(PDIVN<<0)
            288. strr1,[r0]
            290. ldrr0,=UPLLCON
            291. ldrr1,=(U_MDIV<<12)|(U_PDIV<<4)|(U_SDIV<<0)@Fin=12MUPLL=48M
            292. strr1,[r0]
            293. nop
            294. nop
            295. nop
            296. nop
            297. nop
            298. nop
            299. nop
            300. ldrr0,=MPLLCON
            301. ldrr1,=(M_MDIV<<12)|(M_PDIV<<4)|(M_SDIV<<0)@Fin=12MFCLK=400M
            302. strr1,[r0]
            306. movpc,lr
            309. uart_init:
            310. ldrr0,=GPHCON
            311. ldrr1,=0x2aaaa@配置GPIO復(fù)用規(guī)則為串口
            312. strr1,[r0]
            314. ldrr0,=ULCON0
            315. ldrr1,=(IR_MODE<<6)|(Parity_Mode<<3)|(Num_of_stop_bit<<2)|(Word_length<<0)@
            316. strr1,[r0]
            318. ldrr0,=UCON0
            319. ldrr1,=(FCLK_Div<<12)|(Clk_select<<10)|(Tx_Int_Type<<9)|(Rx_Int_Type<<8)|(Rx_Timeout<<7)|(Rx_Error_Stat_Int<<6)|(Loopback_Mode<<5)|(Break_Sig<<4)|(Tx_Mode<<2)|(Rx_Mode<<0)
            320. strr1,[r0]
            322. ldrr0,=UFCON0
            323. ldrr1,=(Tx_FIFO_Trig_Level<<6)|(Rx_FIFO_Trig_Level<<4)|(Tx_FIFO_Reset<<2)|(Rx_FIFO_Reset<<1)|(FIFO_Enable<<0)@
            324. strr1,[r0]
            326. ldrr0,=UBRDIV0
            327. ldrr1,=(UBRDIV<<0)
            328. strr1,[r0]
            330. movpc,lr
            332. Buzzer_Freq_Set:
            334. //ldrr0,=GPBCON
            335. //ldrr1,=0x15400@這個(gè)時(shí)候暫不配置GPB0為T(mén)OUT0，這時(shí)候只是配置GPB0為T(mén)OUT0
            336. //strr1,[r0]
            338. ldrr2,=GPBDAT
            339. ldrr1,=0x1c1
            340. strr1,[r2]
            342. ldrr2,=GPBCON
            343. ldrr1,[r2]
            344. ldrr1,[r1]
            345. //ldrr1,=0x15400
            346. bicr1,r1,#0x3
            347. orrr1,r1,#0x2
            348. strr1,[r2]
            350. ldrr2,=GPBDAT
            351. ldrr1,=0x1a0
            352. strr1,[r2]
            354. ldrr1,=TCFG0
            355. ldrr2,=(Prescaler0<<0)
            356. strr2,[r1]
            358. ldrr1,=TCFG1
            359. ldrr2,=(DMA_MODE<<20)|(MUX0<<0)
            360. strr2,[r1]
            362. //ldrr3,[r0]
            363. //strr3,[r2]
            365. 				   
				
            
                
			
							
              
                
			            
                            
              
            
            
		
            
		
            
		
            
		
            
		
            
			
              
				
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            			            ARM匯編s3c2440PW
                        
            
            
            
			
            
		
            	
		

	

            
	
	
            
		
            
			
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