/************************************************************
* DIGITAL I/O Port1/2寄存器定義 有中斷功能
************************************************************/

#define P1IN_ 0x0020 /* P1輸入寄存器*/
const sfrb P1IN = P1IN_;
#define P1OUT_ 0x0021 /* P1輸出寄存器*/
sfrb P1OUT = P1OUT_;
#define P1DIR_ 0x0022 /* P1方向選擇寄存器*/
sfrb P1DIR = P1DIR_;
#define P1IFG_ 0x0023 /* P1中斷標(biāo)志寄存器*/
sfrb P1IFG = P1IFG_;
#define P1IES_ 0x0024 /* P1中斷邊沿選擇寄存器*/
sfrb P1IES = P1IES_;
#define P1IE_ 0x0025 /* P1中斷使能寄存器*/
sfrb P1IE = P1IE_;
#define P1SEL_ 0x0026 /* P1功能選擇寄存器*/
sfrb P1SEL = P1SEL_;

#define P2IN_ 0x0028 /* P2輸入寄存器*/
const sfrb P2IN = P2IN_;
#define P2OUT_ 0x0029 /* P2輸出寄存器 */
sfrb P2OUT = P2OUT_;
#define P2DIR_ 0x002A /* P2方向選擇寄存器 */
sfrb P2DIR = P2DIR_;
#define P2IFG_ 0x002B /* P2中斷標(biāo)志寄存器*/
sfrb P2IFG = P2IFG_;
#define P2IES_ 0x002C /* P2中斷邊沿選擇寄存器*/
sfrb P2IES = P2IES_;
#define P2IE_ 0x002D /* P2中斷使能寄存器*/
sfrb P2IE = P2IE_;
#define P2SEL_ 0x002E /* P2功能選擇寄存器*/
sfrb P2SEL = P2SEL_;

MSP430寄存器中文注釋---P3/4口（無(wú)中斷功能）

/************************************************************
* DIGITAL I/O Port3/4寄存器定義 無(wú)中斷功能
************************************************************/

#define P3IN_ 0x0018 /* P3輸入寄存器*/
const sfrb P3IN = P3IN_;
#define P3OUT_ 0x0019 /* P3輸出寄存器*/
sfrb P3OUT = P3OUT_;
#define P3DIR_ 0x001A /* P3方向選擇寄存器*/
sfrb P3DIR = P3DIR_;
#define P3SEL_ 0x001B /* P3功能選擇寄存器*/
sfrb P3SEL = P3SEL_;

#define P4IN_ 0x001C /* P4輸入寄存器*/
const sfrb P4IN = P4IN_;
#define P4OUT_ 0x001D /* P4輸出寄存器*/
sfrb P4OUT = P4OUT_;
#define P4DIR_ 0x001E /* P4方向選擇寄存器*/
sfrb P4DIR = P4DIR_;
#define P4SEL_ 0x001F /* P4功能選擇寄存器*/
sfrb P4SEL = P4SEL_;

/************************************************************
* DIGITAL I/O Port5/6 I/O口寄存器定義PORT5和6無(wú)中斷功能

************************************************************/

#define P5IN_ 0x0030 /* P5輸入寄存器*/
const sfrb P5IN = P5IN_;
#define P5OUT_ 0x0031 /* P5輸出寄存器*/
sfrb P5OUT = P5OUT_;
#define P5DIR_ 0x0032 /* P5方向選擇寄存器*/
sfrb P5DIR = P5DIR_;
#define P5SEL_ 0x0033 /* P5功能選擇寄存器*/
sfrb P5SEL = P5SEL_;

#define P6IN_ 0x0034 /* P6輸入寄存器*/
const sfrb P6IN = P6IN_;
#define P6OUT_ 0x0035 /* P6輸出寄存器*/
sfrb P6OUT = P6OUT_;
#define P6DIR_ 0x0036 /* P6方向選擇寄存器*/
sfrb P6DIR = P6DIR_;
#define P6SEL_ 0x0037 /* P6功能選擇寄存器*/
sfrb P6SEL = P6SEL_;

MSP430寄存器中文注釋---硬件乘法器

/************************************************************
硬件乘法器的寄存器定義
************************************************************/

#define MPY_ 0x0130 /*無(wú)符號(hào)乘法*/
sfrw MPY = MPY_;
#define MPYS_ 0x0132 /*有符號(hào)乘法*/
sfrw MPYS = MPYS_;
#define MAC_ 0x0134 /*無(wú)符號(hào)乘加*/
sfrw MAC = MAC_;
#define MACS_ 0x0136 /*有符號(hào)乘加*/
sfrw MACS = MACS_;
#define OP2_ 0x0138 /*第二乘數(shù)*/
sfrw OP2 = OP2_;
#define RESLO_ 0x013A /*低6位結(jié)果寄存器*/
sfrw RESLO = RESLO_;
#define RESHI_ 0x013C /*高6位結(jié)果寄存器*/
sfrw RESHI = RESHI_;
#define SUMEXT_ 0x013E /*結(jié)果擴(kuò)展寄存器 */
const sfrw SUMEXT = SUMEXT_;

MSP430寄存器中文注釋---看門(mén)狗和定時(shí)器

/************************************************************
*看門(mén)狗定時(shí)器的寄存器定義
************************************************************/

#define WDTCTL_ 0x0120
sfrw WDTCTL = WDTCTL_;
#define WDTIS0 0x0001 /*選擇WDTCNT的四個(gè)輸出端之一*/
#define WDTIS1 0x0002 /*選擇WDTCNT的四個(gè)輸出端之一*/
#define WDTSSEL 0x0004 /*選擇WDTCNT的時(shí)鐘源*/
#define WDTCNTCL 0x0008 /*清除WDTCNT端:為1時(shí) 從0開(kāi)始計(jì)數(shù)*/
#define WDTTMSEL 0x0010 /*選擇模式 0:看門(mén)狗模式; 1:定時(shí)器模式*/
#define WDTNMI 0x0020 /*選擇NMI/RST引腳功能0:為RST; 1:為NMI*/
#define WDTNMIES 0x0040 /*WDTNMI=1時(shí).選擇觸發(fā)延0:為上升延1:為下降延*/
#define WDTHOLD 0x0080 /*停止看門(mén)狗定時(shí)器工作0:啟動(dòng);1:停止*/

#define WDTPW 0x5A00 /*寫(xiě)密碼:高八位*/

/* SMCLK= 1MHz定時(shí)器模式*/
#define WDT_MDLY_32 WDTPW+WDTTMSEL+WDTCNTCL /* TSMCLK*2POWER15=32ms復(fù)位狀態(tài)*/
#define WDT_MDLY_8 WDTPW+WDTTMSEL+WDTCNTCL+WDTIS0 /* TSMCLK*2POWER13=8.192ms " */
#define WDT_MDLY_0_5 WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1 /* TSMCLK*2POWER9=0.512ms " */
#define WDT_MDLY_0_064 WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1+WDTIS0 /* TSMCLK*2POWER6=0.512ms " */
/* ACLK=32.768KHz定時(shí)器模式*/
#define WDT_ADLY_1000 WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL /* TACLK*2POWER15=1000ms " */
#define WDT_ADLY_250 WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS0 /* TACLK*2POWER13=250ms " */
#define WDT_ADLY_16 WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1 /* TACLK*2POWER9=16ms " */
#define WDT_ADLY_1_9 WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0 /* TACLK*2POWER6=1.9ms " */
/* SMCLK=1MHz看門(mén)狗模式*/
#define WDT_MRST_32 WDTPW+WDTCNTCL /* TSMCLK*2POWER15=32ms復(fù)位狀態(tài) */
#define WDT_MRST_8 WDTPW+WDTCNTCL+WDTIS0 /* TSMCLK*2POWER13=8.192ms " */
#define WDT_MRST_0_5 WDTPW+WDTCNTCL+WDTIS1 /* TSMCLK*2POWER9=0.512ms " */
#define WDT_MRST_0_064 WDTPW+WDTCNTCL+WDTIS1+WDTIS0 /* TSMCLK*2POWER6=0.512ms " */
/* ACLK=32KHz看門(mén)狗模式*/
#define WDT_ARST_1000 WDTPW+WDTCNTCL+WDTSSEL /* TACLK*2POWER15=1000ms " */
#define WDT_ARST_250 WDTPW+WDTCNTCL+WDTSSEL+WDTIS0 /* TACLK*2POWER13=250ms " */
#define WDT_ARST_16 WDTPW+WDTCNTCL+WDTSSEL+WDTIS1 /* TACLK*2POWER9=16ms " */
#define WDT_ARST_1_9 WDTPW+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0 /* TACLK*2POWER6=1.9ms " */

MSP430寄存器中文注釋---A/D采樣寄存器定義

/************************************************************
* ADC12 A/D采樣寄存器定義
************************************************************/
/*ADC12轉(zhuǎn)換控制類(lèi)寄存器*/
#define ADC12CTL0_ 0x0; /* ADC12 Control 0 */
sfrw ADC12CTL0 = ADC12CTL0_;
#define ADC12CTL1_ 0x01A2 /* ADC12 Control 1 */
sfrw ADC12CTL1 = ADC12CTL1_;

/*ADC12中斷控制類(lèi)寄存器*/
#define ADC12IFG_ 0x01A4 /* ADC12 Interrupt Flag */
sfrw ADC12IFG = ADC12IFG_;
#define ADC12IE_ 0x01A6 /* ADC12 Interrupt Enable */
sfrw ADC12IE = ADC12IE_;
#define ADC12IV_ 0x01A8 /* ADC12 Interrupt Vector Word */
sfrw ADC12IV = ADC12IV_;

/*ADC12存貯器類(lèi)寄存器*/
#define ADC12MEM_ 0x0140 /* ADC12 Conversion Memory */
#ifndef __IAR_SYSTEMS_ICC
#define ADC12MEM ADC12MEM_ /* ADC12 Conversion Memory (for assembler) */
#else
#define ADC12MEM ((int*) ADC12MEM_) /* ADC12 Conversion Memory (for C) */
#endif
#define ADC12MEM0_ ADC12MEM_ /* ADC12 Conversion Memory 0 */
sfrw ADC12MEM0 = ADC12MEM0_;
#define ADC12MEM1_ 0x0142 /* ADC12 Conversion Memory 1 */
sfrw ADC12MEM1 = ADC12MEM1_;
#define ADC12MEM2_ 0x0144 /* ADC12 Conversion Memory 2 */
sfrw ADC12MEM2 = ADC12MEM2_;
#define ADC12MEM3_ 0x0146 /* ADC12 Conversion Memory 3 */
sfrw ADC12MEM3 = ADC12MEM3_;
#define ADC12MEM4_ 0x0148 /* ADC12 Conversion Memory 4 */
sfrw ADC12MEM4 = ADC12MEM4_;
#define ADC12MEM5_ 0x014A /* ADC12 Conversion Memory 5 */
sfrw ADC12MEM5 = ADC12MEM5_;
#define ADC12MEM6_ 0x014C /* ADC12 Conversion Memory 6 */
sfrw ADC12MEM6 = ADC12MEM6_;
#define ADC12MEM7_ 0x014E /* ADC12 Conversion Memory 7 */
sfrw ADC12MEM7 = ADC12MEM7_;
#define ADC12MEM8_ 0x0150 /* ADC12 Conversion Memory 8 */
sfrw ADC12MEM8 = ADC12MEM8_;
#define ADC12MEM9_ 0x0152 /* ADC12 Conversion Memory 9 */
sfrw ADC12MEM9 = ADC12MEM9_;
#define ADC12MEM10_ 0x0154 /* ADC12 Conversion Memory 10 */
sfrw ADC12MEM10 = ADC12MEM10_;
#define ADC12MEM11_ 0x0156 /* ADC12 Conversion Memory 11 */
sfrw ADC12MEM11 = ADC12MEM11_;
#define ADC12MEM12_ 0x0158 /* ADC12 Conversion Memory 12 */
sfrw ADC12MEM12 = ADC12MEM12_;
#define ADC12MEM13_ 0x015A /* ADC12 Conversion Memory 13 */
sfrw ADC12MEM13 = ADC12MEM13_;
#define ADC12MEM14_ 0x015C /* ADC12 Conversion Memory 14 */
sfrw ADC12MEM14 = ADC12MEM14_;
#define ADC12MEM15_ 0x015E /* ADC12 Conversion Memory 15 */
sfrw ADC12MEM15 = ADC12MEM15_;

/*ADC12存貯控制類(lèi)寄存器*/
#define ADC12MCTL_ 0x0080 /* ADC12 Memory Control */
#ifndef __IAR_SYSTEMS_ICC
#define ADC12MCTL ADC12MCTL_ /* ADC12 Memory Control (for assembler) */
#else
#define ADC12MCTL ((char*) ADC12MCTL_) /* ADC12 Memory Control (for C) */
#endif
#define ADC12MCTL0_ ADC12MCTL_ /* ADC12 Memory Control 0 */
sfrb ADC12MCTL0 = ADC12MCTL0_;
#define ADC12MCTL1_ 0x0081 /* ADC12 Memory Control 1 */
sfrb ADC12MCTL1 = ADC12MCTL1_;
#define ADC12MCTL2_ 0x0082 /* ADC12 Memory Control 2 */
sfrb ADC12MCTL2 = ADC12MCTL2_;
#define ADC12MCTL3_ 0x0083 /* ADC12 Memory Control 3 */
sfrb ADC12MCTL3 = ADC12MCTL3_;
#define ADC12MCTL4_ 0x0084 /* ADC12 Memory Control 4 */
sfrb ADC12MCTL4 = ADC12MCTL4_;
#define ADC12MCTL5_ 0x0085 /* ADC12 Memory Control 5 */
sfrb ADC12MCTL5 = ADC12MCTL5_;
#define ADC12MCTL6_ 0x0086 /* ADC12 Memory Control 6 */
sfrb ADC12MCTL6 = ADC12MCTL6_;
#define ADC12MCTL7_ 0x0087 /* ADC12 Memory Control 7 */
sfrb ADC12MCTL7 = ADC12MCTL7_;
#define ADC12MCTL8_ 0x0088 /* ADC12 Memory Control 8 */
sfrb ADC12MCTL8 = ADC12MCTL8_;
#define ADC12MCTL9_ 0x0089 /* ADC12 Memory Control 9 */
sfrb ADC12MCTL9 = ADC12MCTL9_;
#define ADC12MCTL10_ 0x008A /* ADC12 Memory Control 10 */
sfrb ADC12MCTL10 = ADC12MCTL10_;
#define ADC12MCTL11_ 0x008B /* ADC12 Memory Control 11 */
sfrb ADC12MCTL11 = ADC12MCTL11_;
#define ADC12MCTL12_ 0x008C /* ADC12 Memory Control 12 */
sfrb ADC12MCTL12 = ADC12MCTL12_;
#define ADC12MCTL13_ 0x008D /* ADC12 Memory Control 13 */
sfrb ADC12MCTL13 = ADC12MCTL13_;
#define ADC12MCTL14_ 0x008E /* ADC12 Memory Control 14 */
sfrb ADC12MCTL14 = ADC12MCTL14_;
#define ADC12MCTL15_ 0x008F /* ADC12 Memory Control 15 */
sfrb ADC12MCTL15 = ADC12MCTL15_;

/* ADC12CTL0內(nèi)8位控制寄存器位*/
#define ADC12SC 0x001 /*采樣/轉(zhuǎn)換控制位*/
#define ENC 0x002 /*轉(zhuǎn)換允許位*/
#define ADC12TOVIE 0x004 /*轉(zhuǎn)換時(shí)間溢出中斷允許位*/
#define ADC12OVIE 0x008 /*溢出中斷允許位*/
#define ADC12ON 0x010 /*ADC12內(nèi)核控制位*/
#define REFON 0x020 /*參考電壓控制位*/
#define REF2_5V 0x040 /*內(nèi)部參考電壓的電壓值選擇位0為1.5V; 1為2.5V*/
#define MSH 0x080 /*多次采樣/轉(zhuǎn)換位*/
#define MSC 0x080 /*多次采樣/轉(zhuǎn)換位*/
/*SHT0采樣保持定時(shí)器0控制ADC12的結(jié)果存貯器MEM0~MEM7的采樣周期*/
#define SHT0_0 0*0x100 /*采樣周期=TADC12CLK*4 */
#define SHT0_1 1*0x100 /*采樣周期=TADC12CLK*8 */
#define SHT0_2 2*0x100 /*采樣周期=TADC12CLK*16 */
#define SHT0_3 3*0x100 /*采樣周期=TADC12CLK*32 */
#define SHT0_4 4*0x100 /*采樣周期=TADC12CLK*64 */
#define SHT0_5 5*0x100 /*采樣周期=TADC12CLK*96 */
#define SHT0_6 6*0x100 /*采樣周期=TADC12CLK*128 */
#define SHT0_7 7*0x100 /*采樣周期=TADC12CLK*192 */
#define SHT0_8 8*0x100 /*采樣周期=TADC12CLK*256 */
#define SHT0_9 9*0x100 /*采樣周期=TADC12CLK*384 */
#define SHT0_10 10*0x100 /*采樣周期=TADC12CLK*512 */
#define SHT0_11 11*0x100 /*采樣周期=TADC12CLK*768 */
#define SHT0_12 12*0x100 /*采樣周期=TADC12CLK*1024 */
#define SHT0_13 13*0x100 /*采樣周期=TADC12CLK*1024 */
#define SHT0_14 14*0x100 /*采樣周期=TADC12CLK*1024 */
#define SHT0_15 15*0x100 /*采樣周期=TADC12CLK*1024 */
/*SHT1采樣保持定時(shí)器1控制ADC12的結(jié)果存貯器MEM8~MEM15的采樣周期*/
#define SHT1_0 0*0x100 /*采樣周期=TADC12CLK*4 */
#define SHT1_1 1*0x100 /*采樣周期=TADC12CLK*8 */
#define SHT1_2 2*0x100 /*采樣周期=TADC12CLK*16 */
#define SHT1_3 3*0x100 /*采樣周期=TADC12CLK*32 */
#define SHT1_4 4*0x100 /*采樣周期=TADC12CLK*64 */
#define SHT1_5 5*0x100 /*采樣周期=TADC12CLK*96 */
#define SHT1_6 6*0x100 /*采樣周期=TADC12CLK*128 */
#define SHT1_7 7*0x100 /*采樣周期=TADC12CLK*192 */
#define SHT1_8 8*0x100 /*采樣周期=TADC12CLK*256 */
#define SHT1_9 9*0x100 /*采樣周期=TADC12CLK*384 */
#define SHT1_10 10*0x100 /*采樣周期=TADC12CLK*512 */
#define SHT1_11 11*0x100 /*采樣周期=TADC12CLK*768 */
#define SHT1_12 12*0x100 /*采樣周期=TADC12CLK*1024 */
#define SHT1_13 13*0x100 /*采樣周期=TADC12CLK*1024 */
#define SHT1_14 14*0x100 /*采樣周期=TADC12CLK*1024 */
#define SHT1_15 15*0x100 /*采樣周期=TADC12CLK*1024 */

/* ADC12CTL1內(nèi)8位控制寄存器位*/
#define ADC12BUSY 0x0001 /*ADC12忙標(biāo)志位*/
#define CONSEQ_0 0*2 /*單通道單次轉(zhuǎn)換*/
#define CONSEQ_1 1*2 /*序列通道單次轉(zhuǎn)換*/
#define CONSEQ_2 2*2 /*單通道多次轉(zhuǎn)換*/
#define CONSEQ_3 3*2 /*序列通道多次轉(zhuǎn)換*/
#define ADC12SSEL_0 0*8 /*ADC12內(nèi)部時(shí)鐘源*/
#define ADC12SSEL_1 1*8 /*ACLK*/
#define ADC12SSEL_2 2*8 /*MCLK*/
#define ADC12SSEL_3 3*8 /*SCLK*/
#define ADC12DIV_0 0*0x20 /*1分頻*/
#define ADC12DIV_1 1*0x20 /*2分頻*/
#define ADC12DIV_2 2*0x20 /*3分頻*/
#define ADC12DIV_3 3*0x20 /*4分頻*/
#define ADC12DIV_4 4*0x20 /*5分頻*/
#define ADC12DIV_5 5*0x20 /*6分頻*/
#define ADC12DIV_6 6*0x20 /*7分頻*/
#define ADC12DIV_7 7*0x20 /*8分頻*/
#define ISSH 0x0100 /*采樣輸入信號(hào)反向與否控制位*/
#define SHP 0x0200 /*采樣信號(hào)(SAMPCON)選擇控制位*/
#define SHS_0 0*0x400 /*采樣信號(hào)輸入源選擇控制位ADC12SC*/
#define SHS_1 1*0x400 /*采樣信號(hào)輸入源選擇控制位TIMER_A.OUT1*/
#define SHS_2 2*0x400 /*采樣信號(hào)輸入源選擇控制位TIMER_B.OUT0*/
#define SHS_3 3*0x400 /*采樣信號(hào)輸入源選擇控制位TIMER_B.OUT1*/
/*轉(zhuǎn)換存貯器地址定義位*/
#define CSTARTADD_0 0*0x1000 /*選擇MEM0首地址*/
#define CSTARTADD_1 1*0x1000 /*選擇MEM1首地址*/
#define CSTARTADD_2 2*0x1000 /*選擇MEM2首地址*/
#define CSTARTADD_3 3*0x1000 /*選擇MEM3首地址*/
#define CSTARTADD_4 4*0x1000 /*選擇MEM4首地址*/
#define CSTARTADD_5 5*0x1000 /*選擇MEM5首地址*/
#define CSTARTADD_6 6*0x1000 /*選擇MEM6首地址*/
#define CSTARTADD_7 7*0x1000 /*選擇MEM7首地址*/
#define CSTARTADD_8 8*0x1000 /*選擇MEM8首地址*/
#define CSTARTADD_9 9*0x1000 /*選擇MEM9首地址*/
#define CSTARTADD_10 10*0x1000 /*選擇MEM10首地址*/
#define CSTARTADD_11 11*0x1000 /*選擇MEM11首地址*/
#define CSTARTADD_12 12*0x1000 /*選擇MEM12首地址*/
#define CSTARTADD_13 13*0x1000 /*選擇MEM13首地址*/
#define CSTARTADD_14 14*0x1000 /*選擇MEM14首地址*/
#define CSTARTADD_15 15*0x1000 /*選擇MEM15首地址*/

/* ADC12MCTLx */
#define INCH_0 0 /*選擇模擬量通道0 A0 */
#define INCH_1 1 /*選擇模擬量通道0 A1*/
#define INCH_2 2 /*選擇模擬量通道0 A2*/
#define INCH_3 3 /*選擇模擬量通道0 A3*/
#define INCH_4 4 /*選擇模擬量通道0 A4*/
#define INCH_5 5 /*選擇模擬量通道0 A5*/
#define INCH_6 6 /*選擇模擬量通道0 A6*/
#define INCH_7 7 /*選擇模擬量通道0 A7*/
#define INCH_8 8 /*VEREF+*/
#define INCH_9 9 /*VEREF-*/
#define INCH_10 10 /*片內(nèi)溫度傳感器的輸出*/
#define INCH_11 11 /*(AVCC-AVSS)/2*/
#define INCH_12 12 /*(AVCC-AVSS)/2*/
#define INCH_13 13 /*(AVCC-AVSS)/2*/
#define INCH_14 14 /*(AVCC-AVSS)/2*/
#define INCH_15 15 /*(AVCC-AVSS)/2*/
/*參考電壓源選擇位*/
#define SREF_0 0*0x10 /*VR+ = AVCC; VR- = AVSS*/
#define SREF_1 1*0x10 /*VR+ = VREF+; VR- = AVSS*/
#define SREF_2 2*0x10 /*VR+ = VEREF+; VR- = AVSS*/
#define SREF_3 3*0x10 /*VR+ = VEREF+; VR- = AVSS*/
#define SREF_4 4*0x10 /*VR+ = AVCC; VR- = VREF-*/
#define SREF_5 5*0x10 /*VR+ = VREF+; VR- = VREF-*/
#define SREF_6 6*0x10 /*VR+ = VEREF+; VR- = VREF-*/
#define SREF_7 7*0x10 /*VR+ = VEREF+; VR- = VREF-*/
#define EOS 0x80 /*序列結(jié)束選擇位*/

MSP430寄存器中文注釋----串口寄存器

/************************************************************
* USART串口寄存器"UCTL","UTCTL","URCTL"定義的各個(gè)位可串口1串口2公用
************************************************************/
/* UCTL串口控制寄存器*/
#define PENA 0x80 /*校驗(yàn)允許位*/
#define PEV 0x40 /*偶校驗(yàn)為0時(shí)為奇校驗(yàn)*/
#define SPB 0x20 /*停止位為2為0時(shí)停止位為1*/
#define CHAR 0x10 /*數(shù)據(jù)位為8位為0時(shí)數(shù)據(jù)位為7位*/
#define LISTEN 0x08 /*自環(huán)模式(發(fā)數(shù)據(jù)同時(shí)在把發(fā)的數(shù)據(jù)接收回來(lái))*/
#define SYNC 0x04 /*同步模式為0異步模式*/
#define MM 0x02 /*為1時(shí)地址位多機(jī)協(xié)議(異步)主機(jī)模式(同步);為0時(shí)線路空閑多機(jī)協(xié)議(異步)從機(jī)模式(同步)*/
#define SWRST 0x01 /*控制位*/

/* UTCTL串口發(fā)送控制寄存器*/
#define CKPH 0x80 /*時(shí)鐘相位控制位(只同步方式用)為1時(shí)時(shí)鐘UCLK延時(shí)半個(gè)周期*/
#define CKPL 0x40 /*時(shí)鐘極性控制位 為1時(shí)異步與UCLK相反;同步下降延有效*/
#define SSEL1 0x20 /*時(shí)鐘源選擇位:與SSEL0組合為0,1,2,3四種方式*/
#define SSEL0 0x10 /*"0"選擇外部時(shí)鐘,"1"選擇輔助時(shí)鐘,"2","3"選擇系統(tǒng)子時(shí)鐘*/
#define URXSE 0x08 /*接收觸發(fā)延控制位(只在異步方式下用)*/
#define TXWAKE 0x04 /*多處理器通信傳送控制位(只在異步方式下用)*/
#define STC 0x02 /*外部引腳STE選擇位為0時(shí)為4線模式 為1時(shí)為3線模式*/
#define TXEPT 0x01 /*發(fā)送器空標(biāo)志*/

/* URCTL串口接收控制寄存器同步模式下只用兩位:FE和OE*/
#define FE 0x80 /*幀錯(cuò)標(biāo)志*/
#define PE 0x40 /*校驗(yàn)錯(cuò)標(biāo)志位*/
#define OE 0x20 /*溢出標(biāo)志位*/
#define BRK 0x10 /*打斷檢測(cè)位*/
#define URXEIE 0x08 /*接收出錯(cuò)中斷允許位*/
#define URXWIE 0x04 /*接收喚醒中斷允許位*/
#define RXWAKE 0x02 /*接收喚醒檢測(cè)位*/
#define RXERR 0x01 /*接收錯(cuò)誤標(biāo)志位*/

/************************************************************
* USART 0串口0寄存器定義
************************************************************/

#define U0CTL_ 0x0070 /* UART 0 Control */
sfrb U0CTL = U0CTL_;
#define U0TCTL_ 0x0071 /* UART 0 Transmit Control */
sfrb U0TCTL = U0TCTL_;
#define U0RCTL_ 0x0072 /* UART 0 Receive Control */
sfrb U0RCTL = U0RCTL_;
#define U0MCTL_ 0x0073 /* UART 0 Modulation Control */
sfrb U0MCTL = U0MCTL_;
#define U0BR0_ 0x0074 /* UART 0 Baud Rate 0 */
sfrb U0BR0 = U0BR0_;
#define U0BR1_ 0x0075 /* UART 0 Baud Rate 1 */
sfrb U0BR1 = U0BR1_;
#define U0RXBUF_ 0x0076 /* UART 0 Receive Buffer */
const sfrb U0RXBUF = U0RXBUF_;
#define U0TXBUF_ 0x0077 /* UART 0 Transmit Buffer */
sfrb U0TXBUF = U0TXBUF_;

/* Alternate register names */

#define UCTL0_ 0x0070 /* UART 0 Control */
sfrb UCTL0 = UCTL0_;
#define UTCTL0_ 0x0071 /* UART 0 Transmit Control */
sfrb UTCTL0 = UTCTL0_;
#define URCTL0_ 0x0072 /* UART 0 Receive Control */
sfrb URCTL0 = URCTL0_;
#define UMCTL0_ 0x0073 /* UART 0 Modulation Control */
sfrb UMCTL0 = UMCTL0_;
#define UBR00_ 0x0074 /* UART 0 Baud Rate 0 */
sfrb UBR00 = UBR00_;
#define UBR10_ 0x0075 /* UART 0 Baud Rate 1 */
sfrb UBR10 = UBR10_;
#define RXBUF0_ 0x0076 /* UART 0 Receive Buffer */
const sfrb RXBUF0 = RXBUF0_;
#define TXBUF0_ 0x0077 /* UART 0 Transmit Buffer */
sfrb TXBUF0 = TXBUF0_;

#define UCTL_0_ 0x0070 /* UART 0 Control */
sfrb UCTL_0 = UCTL_0_;
#define UTCTL_0_ 0x0071 /* UART 0 Transmit Control */
sfrb UTCTL_0 = UTCTL_0_;
#define URCTL_0_ 0x0072 /* UART 0 Receive Control */
sfrb URCTL_0 = URCTL_0_;
#define UMCTL_0_ 0x0073 /* UART 0 Modulation Control */
sfrb UMCTL_0 = UMCTL_0_;
#define UBR0_0_ 0x0074 /* UART 0 Baud Rate 0 */
sfrb UBR0_0 = UBR0_0_;
#define UBR1_0_ 0x0075 /* UART 0 Baud Rate 1 */
sfrb UBR1_0 = UBR1_0_;
#define RXBUF_0_ 0x0076 /* UART 0 Receive Buffer */
const sfrb RXBUF_0 = RXBUF_0_;
#define TXBUF_0_ 0x0077 /* UART 0 Transmit Buffer */
sfrb TXBUF_0 = TXBUF_0_;

/************************************************************
* USART 1串口1寄存器定義
************************************************************/

#define U1CTL_ 0x0078 /* UART 1 Control */
sfrb U1CTL = U1CTL_;
#define U1TCTL_ 0x0079 /* UART 1 Transmit Control */
sfrb U1TCTL = U1TCTL_;
#define U1RCTL_ 0x007A /* UART 1 Receive Control */
sfrb U1RCTL = U1RCTL_;
#define U1MCTL_ 0x007B /* UART 1 Modulation Control */
sfrb U1MCTL = U1MCTL_;
#define U1BR0_ 0x007C /* UART 1 Baud Rate 0 */
sfrb U1BR0 = U1BR0_;
#define U1BR1_ 0x007D /* UART 1 Baud Rate 1 */
sfrb U1BR1 = U1BR1_;
#define U1RXBUF_ 0x007E /* UART 1 Receive Buffer */
const sfrb U1RXBUF = U1RXBUF_;
#define U1TXBUF_ 0x007F /* UART 1 Transmit Buffer */
sfrb U1TXBUF = U1TXBUF_;

#define UCTL1_ 0x0078 /* UART 1 Control */
sfrb UCTL1 = UCTL1_;
#define UTCTL1_ 0x0079 /* UART 1 Transmit Control */
sfrb UTCTL1 = UTCTL1_;
#define URCTL1_ 0x007A /* UART 1 Receive Control */
sfrb URCTL1 = URCTL1_;
#define UMCTL1_ 0x007B /* UART 1 Modulation Control */
sfrb UMCTL1 = UMCTL1_;
#define UBR01_ 0x007C /* UART 1 Baud Rate 0 */
sfrb UBR01 = UBR01_;
#define UBR11_ 0x007D /* UART 1 Baud Rate 1 */
sfrb UBR11 = UBR11_;
#define RXBUF1_ 0x007E /* UART 1 Receive Buffer */
const sfrb RXBUF1 = RXBUF1_;
#define TXBUF1_ 0x007F /* UART 1 Transmit Buffer */
sfrb TXBUF1 = TXBUF1_;

#define UCTL_1_ 0x0078 /* UART 1 Control */
sfrb UCTL_1 = UCTL_1_;
#define UTCTL_1_ 0x0079 /* UART 1 Transmit Control */
sfrb UTCTL_1 = UTCTL_1_;
#define URCTL_1_ 0x007A /* UART 1 Receive Control */
sfrb URCTL_1 = URCTL_1_;
#define UMCTL_1_ 0x007B /* UART 1 Modulation Control */
sfrb UMCTL_1 = UMCTL_1_;
#define UBR0_1_ 0x007C /* UART 1 Baud Rate 0 */
sfrb UBR0_1 = UBR0_1_;
#define UBR1_1_ 0x007D /* UART 1 Baud Rate 1 */
sfrb UBR1_1 = UBR1_1_;
#define RXBUF_1_ 0x007E /* UART 1 Receive Buffer */
const sfrb RXBUF_1 = RXBUF_1_;
#define TXBUF_1_ 0x007F /* UART 1 Transmit Buffer */
sfrb TXBUF_1 = TXBUF_1_;